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[原创] TI AFE7444RADAR和无线5G测试器时钟参考设计TIDA-010131

关键词:无线通信 RADAR 无线5G测试器 AFE7444

时间:2019-03-12 10:39:09       来源:中电网

TI公司的AFE7444是基于14位9GSPS DAC和14位3GSPS ADC的四路宽带RF取样模拟前端(AFE),工作频率RF高达6GHz.该器件能直接在C波段进行RF取样而不需要另外的频率转换级.四路14位9GSPS DAC信号带宽高达800MHz,四路14位3GSPS ADC信号带宽高达800MHz,NSD为–151 dBFS/Hz,在fIN = 2.6 GHz的AC性能为–3 dBFS,ANR为55 dBFS,SFDR为73 dBc HD2和HD3.AFE7444的9 GSPS时的DAC功耗为1.7W/路,3GSPS时的ADC功耗为1.8W/路,主要用在案通信设备和测试器以及矿带数字化仪和波形发生器.本文介绍了AFE7444主要特性,功能框图,以及RADAR和无线5G测试器多路RF收发器时钟参考设计TIDA-010131主要特性,RADAR RF前端子系统框图和主要技术指标,参考设计TIDA-010131框图,多路时钟板框图,多个测量测试建立图,时钟板电路图,FMC+ TO FMC+适配板电路图和参考设计TIDA-010131材料清单.

The AFE7444 is a quad-channel, wideband, RFsamplinganalog front end (AFE) based on 14-bit, 9-GSPS DACs and 14-bit, 3-GSPS ADCs. Withoperation at an RF of up to 6 GHz, this deviceenables direct RF sampling into the C-bandfrequency range without the need for additionalfrequency conversions stages. This improvement indensity and flexibility enables high-channel-count,multimission systems.

The DAC signal paths support interpolation anddigital up conversion options that deliver up to 800MHz of signal bandwidth. The differential output pathincludes a digital step attenuator (DSA), whichenables tuning of output power.Each ADC input path includes a dual DSA and RFand Digital power detectors. Flexible decimationoptions provide optimization of data bandwidth.

An 8-lane (8 TX + 8 RX) subclass-1 compliantJESD204B interface operates at up to 15 Gbps. Abypassable on-chip PLL simplifies clock operationwith an optional clock output.

AFE7444主要特性:

1• Four, 14-bit, 9-GSPS DACs
– Up to 800-MHz signal bandwidth
– 1 DSA per channel tunes output power
• Four, 14-Bit, 3-GSPS ADCs
– Up to 800-MHz signal bandwidth
– NSD: –151 dBFS/Hz
– AC performance at fIN = 2.6 GHz, –3 dBFS
– SNR: 55 dBFS
– SFDR: 73 dBc HD2 and HD3
– SFDR: 91 dBc worst spur
– 2 DSA per channel extends dynamic range
– RF and digital power detectors
• RF frequency range: 10 MHz to 6 GHz
• Fast frequency hopping < 1 μs
• Receive digital signal path:
– dual DDC per ADC
– 3-phase coherent 32-bit NCOs per DDC
– Decimation ratio: 3x to 32x
• Transmit digital signal path:
– Dual DUC per DAC with 32-bit NCOs
– Interpolation ratio: 8x to 36x
– Sin(x)/x correction and configurable delay
– Power amplifier protection (PAP)
• JESD204B interface:
– 8 transceivers at up to 15 Gbps
– Subclass 1 multichip synchronization
• Clocks:
– Internal PLL and VCO with bypass option
– Clock output up to 3 GHz with clock divider
• DAC power dissipation: 1.7 W/ch at 9 GSPS
• ADC power dissipation: 1.8 W/ch at 3 GSPS
• Package: 17-mm x 17-mm FC BGA, 0.8-mm pitch

AFE7444应用:

• Communications equipment and testers
• Wideband digitizers and waveform generators

图1.AFE7444功能框图

RADAR和无线5G测试器多路RF收发器时钟参考设计TIDA-010131

Analog front end for high-speed end equipments likephased-array radars, wireless communication testers,and electronic warfare require synchronized, multipletransceiver
signal chains. Each transceiver signalchain includes high-speed, analog-to-digital converters(ADCs), digital-to-analog converters (DACs), and aclock subsystem. The clock subsystem provides lownoise sampling clocks with precise delay adjustment toachieve lowest channel-to-channel skew and optimumsystem performance like signal-to-noise ratio (SNR),spurious free dynamic range (SFDR), IMD3, effectivenumber of bits (ENOB), and so forth. This referencedesign demonstrates multichannel JESD204B clocksgeneration and system performance with AFE7444EVMs. Channel-to-channel skew better than 10 psachieved with 6 GSPS/3 GSPS DAC/ADC clocks up to2.6-GHz radio frequencies and system performancelike SNR and SFDR are comparable to the AFE7444data sheet specifications.

参考设计TIDA-010131主要特性:

• JESD204B complaint clock solution for 8T8R RFsampling analog front end
• Digital functions synchronization across multiple RFAFE transceivers
• Low phase noise clock generation for 14-bit, RFsamplingAFEs
• Fine phase delay adjustment in steps ofapproximately 500 fs to achieve phasesynchronization across multiple devices
• Supports TI’s high-speed data converters andcapture cards (AFE7444EVM, TSW14J56EVM,TSW14J57EVM)

参考设计TIDA-010131应用:

• Phased-array radars
• Wireless communications test equipment
• Electronic warfare

图2. 参考设计TIDA-010131外形图

图3.RADAR RF前端子系统框图
主要技术指标:


图4. 参考设计TIDA-010131框图


图5. AFE7444数字功能SYSREF信号接口框图

图6.多路时钟板框图

图7.多路时钟板硬件图

图8.多个收发器同步系统框图


图9.AFE7444发送器SFDR和IMD3测量测试建立图

图10.AFE7444接收器SNR测量测试建立图

图11. 两个AFE7444模拟通路-通路抖动测量测试建立图

图12. TIDA-010131时钟板电路图(1)


图13. TIDA-010131时钟板电路图(2)

图14. TIDA-010131时钟板电路图(3)

图15. TIDA-010131时钟板电路图(4)

图16. TIDA-010131时钟板电路图(5)

图17. TIDA-010131时钟板电路图(6)

图18. TIDA-010131时钟板电路图(7)

图19. TIDA-010131时钟板电路图(8)

图20. TIDA-010131FMC+ TO FMC+适配板电路图(1)

图21. TIDA-010131FMC+ TO FMC+适配板电路图(2)

图22. TIDA-010131FMC+ TO FMC+适配板电路图(3)

图23. TIDA-010131FMC+ TO FMC+适配板电路图(4)

图24. TIDA-010131FMC+ TO FMC+适配板电路图(5)
参考设计TIDA-010131材料清单:










详情请见:
http://www.ti.com/lit/ds/symlink/afe7444.pdf
http://www.ti.com/lit/ug/tiduek4/tiduek4.pdf
afe7444.pdf
tiduek4.pdf

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